1. Field of the Invention
The invention relates to a flash memory cell, and more particularly to a Zener breakdown based flash memory.
2. Description of the Related Art
The conventional flash memory is an electrically erasable and programmable read only memory (E.sup.2 PROM), which is a non-volatile memory. Normally, a conventional flash memory comprises two gates. One is a floating gate formed of poly-silicon for the purpose of data storage, the other is a control gate for controlling data access. The floating gate is formed under the control gate without direct connecting to the control gate. The characteristic of the flash memory is to erase data block by block. Compared to the conventional E.sup.2 PROM which erases data bit by bit, the data erase is completed in a much shorter time, for example, from a few minutes to one to two seconds. The operation speed of flash memory is thus much faster than the operation speed of the conventional E.sup.2 PROM.
Referring to FIG. 1, on a first type semiconductor substrate 10, a floating gate 18 is formed. Two second type doped regions are formed in the substrate 10 in each side of the floating gate 18. These two second type doped regions include a source region 12 and a drain region 14. On the floating gate 18, a control gate 16 is formed with a bar shape extending on the substrate 10.
As the dimension of devices reduces, it is more and more difficult to fabricate a flash memory with a high programming speed. The process of fabricating a flash memory with a high programming current and a high programming speed is under development.